Free Cascode Amplifier Calculator
Quantify Miller capacitance suppression, calculate high-frequency bandwidth improvement, voltage gain (Av), and output impedance for BJT and FET cascode circuits.
⚡ Circuit Architecture & Bias
Voltage Gain: -361 V/V (51.2 dB) across both circuits
Why Cascodes Rule RF & Wideband Video: By loading the input transistor with the low input impedance of a common-base stage ($r_e approx 1/g_m$), the input transistor's voltage gain is restricted to $A_{v1} approx -1$. Hence, its feedback capacitance ($C_mu$) is multiplied by only $(1 - (-1)) = 2$ instead of hundreds!
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The Miller Effect Problem
In a classic single-transistor common-emitter (CE) or common-source (CS) amplifier, the parasitic feedback capacitance between output and input ($C_mu$ or $C_{gd}$) is magnified at the input by the amplifier's voltage gain due to the Miller Theorem:
Total Input Cap: C_in(CE) = C_π + C_μ × (1 + g_m × R_L)
Input Cutoff: f_-3dB(CE) = 1 / [ 2 × π × (R_sig || r_π) × C_in(CE) ]
If an amplifier has a voltage gain of $-200$ and $C_mu = 3 ext{ pF}$, the effective input capacitance balloons by $3 imes 201 = 603 ext{ pF}$! Driven by even a modest $1 ext{ k}Omega$ source resistance, the input low-pass filter rolls off at a few hundred kilohertz.
How the Cascode Topology Cures It
A cascode couples a common-emitter input stage (Q1) directly into the emitter of a common-base stage (Q2):
- The input impedance looking into the emitter of Q2 is very small: $R_{in2} = r_{e2} approx 1/g_m$.
- Therefore, the voltage gain of Q1 is only $A_{v1} = -g_m imes r_{e2} = -g_m imes (1/g_m) = -1.0$.
- The Miller multiplication for Q1's $C_mu$ is reduced to $C_mu imes (1 - (-1)) = 2 imes C_mu$.
- All the high voltage gain ($A_{v2} = g_m R_L$) is developed at the collector of Q2, where the base is AC-grounded, completely isolating the input from output feedback!
Superior Output Resistance
The cascode also boosts the small-signal output resistance by a factor of $eta$ or $g_m r_o$ ($R_{out} approx eta r_o$ for BJT, $g_m r_o^2$ for MOSFET), making it an ideal active load or current source with near-infinite dynamic impedance.
Frequently Asked Questions
Does a cascode amplifier sacrifice voltage gain for speed?
No! The overall low-frequency voltage gain of a cascode is virtually identical to a single-stage common-emitter amplifier (Av ≈ -gm * RL), but the -3dB bandwidth is often 10 to 30 times wider.
What is the main drawback of a cascode amplifier?
The main penalty is reduced output voltage swing. Because two transistors are stacked in series between the power rails, the circuit requires additional DC headroom (at least one Vbe + Vce(sat) ≈ 1.0V to 1.5V) to keep both transistors in their active linear region.
Can I build a folded cascode for low-voltage supplies?
Yes! In integrated circuit designs operating from 1.8V or 3.3V, engineers use a "folded cascode" where the second transistor is of the complementary polarity (e.g. NPN feeding PNP, or NMOS feeding PMOS). This avoids stacking devices between rails while preserving Miller suppression.