Free H-Bridge Bootstrap Capacitor Calculator
Size high-side gate driver bootstrap capacitors (Cboot), calculate peak gate charge requirements, verify low-side refresh time, and select bootstrap diodes for motor drives and inverters.
⚡ Gate Driver & MOSFET Parameters
✓ 6.6× Design Safety Factor (Standard ceramic X7R)
• Recommended Series Resistor (R_boot): 4.7 Ω to 10 Ω (limits peak inrush current into uncharged C_boot and damps ringing).
• Diode Reverse Recovery (t_rr): ≤ 35 ns Ultrafast (must withstand full DC bus voltage + spikes with zero reverse charge pumping).
• Diode Voltage Rating: Must exceed DC bus voltage by ≥ 1.5× (e.g. 600V diode for 400V bus).
Ceramic Capacitor DC Bias Warning: High-dielectric Class II ceramics (0805/0603 X5R/X7R) lose 40% to 70% of their rated capacitance when biased near their voltage rating. Always choose a 25V or 50V rated ceramic capacitor for 12V gate drive supplies.
Recommended Tools & Equipment
Tested hardware and components for high reliability
How the High-Side Bootstrap Circuit Works
In an N-channel half-bridge or H-bridge inverter, turning on the high-side MOSFET requires driving its gate 10V to 15V above the high-voltage DC bus when the switch node (half-bridge output) swings high.
The bootstrap circuit achieves this without an isolated DC-DC converter:
- When the low-side MOSFET conducts, the switch node is pulled to ground (0V). Current flows from $V_{CC}$ through the bootstrap diode and charges $C_{boot}$ up to $V_{CC} - V_F$.
- When the high-side MOSFET turns on, the switch node rises to the DC bus voltage ($V_{BUS}$). The bootstrap capacitor floats with the switch node, maintaining $V_{BUS} + (V_{CC} - V_F)$ at the driver's VB terminal, providing clean gate enhancement.
The Sizing Equation
During the maximum on-time of the high-side switch ($t_{on(max)}$), charge is depleted from $C_{boot}$ due to:
Minimum Capacitance: C_boot(min) = Q_total / ΔV_boot(max)
Engineering Rule: C_boot(rec) ≈ 5 × to 10 × C_boot(min)
Here, $Q_g$ is the MOSFET gate charge, $Q_{ls}$ is internal level-shifter charge (~3-5 nC), and $I_{qbs}$ is the quiescent floating bias current of the gate driver IC.
Why 100% Duty Cycle Fails
If the high-side switch remains continuously ON (100% duty cycle, $t_{off} = 0$), $C_{boot}$ will eventually discharge through the gate driver's internal quiescent current. Once the voltage across $C_{boot}$ drops below the driver's Under-Voltage Lockout (UVLO) threshold (typically 8.0V - 9.0V), the driver shuts down. Applications requiring true 100% static DC drive must use an isolated charge pump or auxiliary DC-DC supply.
Frequently Asked Questions
Can I use a 1N4007 diode for the bootstrap diode?
NEVER use standard mains rectifiers like 1N4007! Their slow reverse recovery time (trr ~ 2 to 5 microseconds) allows massive high-voltage reverse current to blast backwards into your 12V Vcc rail when the switch node rises, blowing up the gate driver IC. Always use an ultrafast recovery diode (trr < 35 ns) such as UF4007, ES1J, or MUR160.
Why does my motor stutter or trigger UVLO at high speeds?
At high duty cycles (e.g. 98%), the low-side conduction window may be too short (less than a few hundred nanoseconds) to fully recharge Cboot through the diode and series resistor. Reduce maximum duty cycle or decrease Rboot.
Should I add an electrolytic capacitor in parallel with Cboot?
Electrolytic capacitors have high equivalent series inductance (ESL) and ESR, making them ineffective at absorbing nanosecond gate charging spikes. Standard industry practice is a 0.47 µF to 2.2 µF low-ESR ceramic capacitor (X7R) placed directly across the VB and VS pins.