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Free MOSFET Gate Drive Resistor Calculator Electronics & Embedded
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Free MOSFET Gate Drive Resistor Calculator

Size external gate resistors (Rg) to prevent gate driver overcurrent, eliminate parasitic ringing, and optimize turn-on and turn-off switching times.

Gate Drive & MOSFET Parameters

V
Typical: 10V - 15V for Si, 15-18V SiC
nC
From datasheet at chosen V_DRV
A
Driver IC pull-up rating
A
Driver IC pull-down rating
Ω
MOSFET internal die resistance
ns
Desired transition speed
kHz
nH
PCB trace + package loop

📊 Recommended Resistor & Driver Specs

Target Turn-On External Resistor (Rg,ext)
6.5 Ω
Minimum safe Rg: 4.5 Ω | Max speed Rg: 6.5 Ω
Peak Turn-On Current
1.50 A
≤ 2.0 A limit (Safe)
Total Gate Drive Power
54.0 mW
P = Qg × Vdrv × fsw
Resistor Dissipation (PRg)
43.9 mW
Min package: 0603 / 0805
Critical Damping (R_crit)
4.0 Ω
Overdamped (No Ringing)
🛡️ Asymmetric Turn-On / Turn-Off Recommendation
For fastest hard-switched turn-off without cross-conduction (Miller dV/dt turn-on), use an antiparallel Schottky diode across Rg with a separate turn-off resistor (e.g., 2.2 Ω) to maximize sink clamping.

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Why Gate Resistor (Rg) Selection Dictates Power Stage Survival

Selecting the external gate drive resistor ($R_g$) for a power MOSFET or IGBT is one of the most critical engineering trade-offs in power electronics. A gate resistor that is too small allows excessively high peak currents that can burn out the gate driver IC, while causing severe voltage overshoot and EMI ringing due to high $di/dt$ and $dv/dt$ acting on parasitic lead inductances. Conversely, a gate resistor that is too large unnecessarily slows down the switching edges, dramatically inflating turn-on and turn-off switching losses ($E_{on}$ and $E_{off}$) and leading to thermal destruction.

1. Minimum Resistor Value for Driver Current Protection

Dedicated gate driver ICs (such as UCC27524, TC4420, or ISO5852) have finite maximum peak source and sink current ratings. At the initial moment of switching, the uncharged MOSFET gate capacitance behaves as a short circuit. The peak instantaneous current drawn from the driver is:

I_peak = V_DRV / (R_driver + R_g,ext + R_g,int)

To ensure the driver does not enter thermal shutdown or exceed its bond wire current limits, the minimum external resistance must satisfy:

R_g,ext(min) ≥ (V_DRV / I_driver,max) - R_driver - R_g,int

2. The Miller Plateau & Desired Rise/Fall Times

During the switching transition, the gate voltage dwells at the Miller Plateau while charging the drain-to-gate capacitance ($C_{gd}$ or $Q_{gd}$). The average gate current needed to sweep through the total gate charge $Q_g$ within the desired target time $t_{sw}$ is:

I_g,avg = Q_g / t_sw

From this required average current, the target total loop resistance is $R_{tot} approx V_{DRV} / I_{g,avg}$, giving $R_{g,ext} = R_{tot} - R_{g,int}$.

3. Eliminating Gate Ringing: The LC Tank Damping Criterion

The PCB layout traces between the driver and the MOSFET gate, combined with the transistor lead frames, introduce parasitic loop inductance ($L_{loop}$, typically 5 to 30 nH). In combination with the MOSFET's input capacitance ($C_{iss} = C_{gs} + C_{gd}$), this forms a series RLC resonator. To prevent underdamped voltage ringing that could breach the gate oxide maximum rating (typically ±20V for standard silicon MOSFETs or +18V/-4V for SiC), the total resistance should be at or near the critical damping value:

R_crit = 2 × √(L_loop / C_iss)

4. Gate Drive Power Dissipation and Resistor Rating

Every cycle charges and discharges the gate capacitance. The total electrical power required from the gate drive supply rail is independent of resistor value and equal to:

P_gate = Q_g × V_DRV × f_sw

This power is split between the driver's internal output transistors, the external gate resistor, and the MOSFET's internal gate resistance according to their proportional resistances. Always select a gate resistor package (such as 0805 or 1206) rated for pulse loads to prevent cracking under repeated high-current transients.

Frequently Asked Questions

Why do many designs use separate turn-on and turn-off resistors?

Turn-on speed is usually restricted to limit dV/dt and di/dt, avoiding diode reverse recovery spikes and severe EMI. However, turn-off must be as fast as possible to minimize turn-off switching losses and prevent spurious dV/dt induced turn-on (Miller effect). Placing a fast diode in parallel with the turn-on resistor allows a smaller turn-off resistor (or direct connection) during discharge.

What is the Miller effect and how does gate resistance influence it?

When a half-bridge switch turns on, the switch node snaps high at huge dV/dt rates. This injects displacement current through the complementary low-side MOSFET's drain-gate capacitance (Cgd) into its gate. If the gate sink resistance is too high, this injected current develops enough voltage across Rg to push Vgs above the threshold (Vth), triggering a disastrous shoot-through short circuit.

How does high switching frequency affect the gate resistor rating?

Because gate drive power is directly proportional to frequency (P = Qg * Vdrv * fsw), raising the switching frequency from 50 kHz to 500 kHz multiplies the continuous heat dissipation in the resistor tenfold. A standard 0402 or 0603 resistor will quickly overheat; designers must use 0805, 1206, or multiple parallel resistors.

Can I operate a MOSFET with Rg = 0 ohms?

Operating with zero external gate resistance maximizes switching speed but is extremely hazardous in physical layouts. Without external damping, parasitic trace inductance (even 10 nH) creates an underdamped LC tank that rings violently, often exceeding the absolute maximum gate-source voltage (+/-20V) and puncturing the gate oxide within microseconds.