Plasma Etch Anisotropy & Aspect Ratio Calculator
Semiconductor dry etching & Reactive Ion Etching (RIE): Calculate directional anisotropy ($A$), lateral undercut, film-to-mask selectivity ($S$), aspect ratio dependent etching (ARDE lag), and sidewall angle.
Etch Rate & Mask Configuration
Anisotropy & Profile Fidelity
Recommended Tools & Equipment
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Frequently Asked Questions
What causes RIE lag in high aspect ratio etching?
RIE lag is primarily caused by neutral reactant Knudsen diffusion starvation inside deep trenches, ion angular spread clipping against the trench upper corners, and electrical charging of insulating sidewalls that repels incoming positive ions.
What is the Bosch process in deep reactive ion etching (DRIE)?
The Bosch process alternates rapidly between an isotropic SF6 chemical etch step and a C4F8 plasma deposition step that coats all surfaces with Teflon-like fluoropolymer passivation. The next directional ion pulse clears polymer only from the trench floor, enabling extreme aspect ratios (> 30:1) with scalloped sidewalls.
How does wafer bias RF power affect etch anisotropy?
Increasing RF bias power increases the DC self-bias voltage across the plasma sheath, accelerating ions normally into the wafer with higher kinetic energy. This enhances directional physical sputtering, increasing vertical etch rate and anisotropy.