Free Supercapacitor Backup & Holdup Tool

Engineering Supercapacitor Holdup & Backup Power Systems

Supercapacitors (Electric Double Layer Capacitors or EDLCs) offer power densities thousands of times higher than conventional electrolytic capacitors and cycle lives exceeding 500,000 charge-discharge cycles. In mission-critical embedded computing, they serve as the primary "last-gasp" power source to cleanly flush volatile DRAM caches to non-volatile flash memory during unexpected blackout events.

Constant-Power Discharge Mechanics

Modern buck and boost converters maintain constant regulated output voltages by acting as constant-power loads. As the supercapacitor voltage collapses from (V_{init}) down to (V_{min}), the current drawn by the converter steadily increases:

$$I(t) = rac{P_{load}}{eta cdot V(t)}$$

The total energy delivered over holdup time (t_{hold}) is:

$$E_{req} = rac{P_{load} cdot t_{hold}}{eta}$$

Accounting for the instantaneous initial IR voltage drop across the bank ESR ((V_{drop} = I_{initial} cdot R_{esr,bank})), the required bank capacitance (C_{bank}) is synthesized as:

$$C_{bank} = rac{2 cdot E_{req}}{(V_{init} - V_{drop})^2 - V_{min}^2}$$

Series Cell Configuration & Active/Passive Balancing

Because individual EDLC cells have low maximum voltage ratings ((2.7 ext{V}) to (3.0 ext{V})), multiple cells must be connected in series for (12 ext{V}) or (24 ext{V}) buses:

$$N_s = leftlceil rac{V_{init}}{V_{cell,rated} cdot 0.95} ight ceil$$

Individual cells in series have unequal manufacturing leakage currents. Without cell balancing resistors or active balancing ICs, the cell with the lowest capacitance will overcharge beyond its breakdown voltage, outgassing and shorting out.