UART Baud Rate Error & Clock Divider Calculator
Calculate integer and fractional clock prescalers (BRR), actual achievable baud rates, and timing error percentages to eliminate serial framing errors.
Microcontroller Clock & Baud Settings
MHz
Actual Baud & Timing Error
PASS (< 2% ERROR)
115,108 bps
-0.08% Error
Baud Rate Register (BRR) Hardware Config
Divisor: 8.6875 (Mantissa: 8, Frac: 11/16)
USART_BRR = 0x008B
UART Frame Timing Tolerances
Target Bit Period (1 bit):
8.68 µs
Stop Bit Sample Drift (10-bit frame):
-0.8% of bit period
Timing Margin Verdict:
Solid synchronization across full frame