High-Speed PCB Via Inductance, Capacitance & Impedance Calculator
Calculate high-speed digital PCB through-hole via parasitic inductance (L), parasitic capacitance (C), characteristic via impedance (Zvia), propagation delay (td), and 10–90% signal rise-time degradation.
Via Geometry & PCB Stackup
mm
Total via barrel length (approx 63 mils for 1.6mm).
mm
Finished via hole drill size (approx 12 mils).
mm
Outer copper annular ring pad size.
mm
Ground plane cutout diameter.
εr
FR-4 (4.0-4.5), Rogers RO4350B (3.48), Polyimide (3.5).
ps
10-90% input driver edge transition.
High-Speed Via Discontinuity
SIGNAL INTEGRITY OK
Via Inductance (Lvia)
1.30 nH
Barrel loop inductance
Via Capacitance (Cvia)
0.56 pF
Antipad ground capacitance
Via Impedance (Zvia)
48.2 Ω
Mismatch to 50Ω: -1.8 Ω
Propagation Delay (td)
27.0 ps
Transit time through barrel
Signal Edge Degradation & Reflections
Degraded Rise Time:
503 ps
Reflection (Γ):
-0.018
Minimal high-frequency dispersion; via capacitance closely balances loop inductance.
Howard Johnson Via Equations:
• Inductance: (L approx 5.08 cdot h cdot [ln(4h/d) + 1]) nH (dimensions in inches)
• Capacitance: (C approx rac{1.41 cdot arepsilon_r cdot h cdot D_1}{D_2 - D_1}) pF
• Characteristic Impedance: (Z_{ ext{via}} = sqrt{L / C}), Delay: (t_d = sqrt{L cdot C})